Within the Hardware R&D team, you will be in charge of the pre-silicon verification of the eFPGA IPs for the current and next generations. You will be responsible for creating and for maintaining test cases, setting up test environment, run interactive and regression simulations, analyze results and coverage. You will select the best strategy to perform the verification (formal, simulation, …), at block level or design level.
This is a challenging position and an opportunity to work within a highly qualified team. You will get the chance to work on one of the most exciting new semiconductor products.

Desired skills and experience

•   At least 5 years of experience in ASIC pre silicon verification.
•   Experience with simulators and waveform debugging tools.
•   Proficient in troubleshooting and determination of root cause.
•   Good knowledge of main design EDA vendor tools.
•   A good knowledge of Verilog and/or VHDL.
•   Experience with FPGAs architectures and related tools is a plus.
•   Good level in scripting languages as TCL or Python is a plus.
•   System Verilog and UVM is a plus
•   Software development experience is a plus

The candidate will work in a dynamic environment and will get to work with teams from different technical areas in which new creative and innovative ideas will be much appreciated.