The demo chip, which integrates Weebit Nano’s embedded Resistive Random-Access Memory (ReRAM) module manufactured on SkyWater’s 130 nm CMOS process, is working as expected and achieving the targeted performances including speed, power and die size.

This achievement demonstrates how the IC’Alps design methodology allows companies to shorten design cycles and quickly achieve working silicon. The demo chip is a key enabler for companies to adopt Weebit’s innovative non-volatile memory (NVM) for development of their system-on-chip (SoC) designs for industrial, automotive and consumer applications.

“IC’Alps performed the physical implementation of the demo chip from Weebit Nano RTL code embedding its non-volatile memory block. This included successful adaptation of an analog technology design kit for a digital flow. We are obviously very happy with the results as the testing phase completed successfully.” – Lucille Engels – Chief Operating Officer – IC’Alps

“We were extremely pleased with IC’Alps’ work on our demo chip for SkyWater’s 130nm process. The IC’Alps team is highly skilled with all aspects of physical implementation, from RTL-to-GDS implementation to tape-out. They met schedule and quality targets, and the chip is fully functional.” – Ilan Sever – Vice-President of R&D – Weebit Nano

The Weebit Nano demo chip comprises a full sub-system for embedded applications, including the Weebit ReRAM module, a RISC-V microcontroller (MCU), system interfaces, memories and peripherals. Weebit’s embedded ReRAM module includes a 256Kb ReRAM array, control logic, decoders, IOs (Input/Output communication elements) and error correcting code (ECC).

IC’Alps and Weebit Nano at Embedded World 2023
IC’Alps and Weebit Nano will both exhibit at the Embedded World Exhibition and Conference 2023, being held in Nuremberg, Germany, March 14-16. Visit IC’Alps in Hall 4, Booth 650c. See a demonstration of Weebit ReRAM IP in Hall 4, Booth 650a.