Annuaire des produits


Improved testing and characterization architecture for the semiconductor industry.


Target markets: engineering platforms that test components before launching volume manufacturing; and small-volume test platforms (100 K units/month).

L'histoire du produit

The purpose of the project was to bring CPU to instrument data transfer rates from 50 Mbps to 6 Gbps, for performance similar to competing solutions for a 20 megapixel imager. The hardware architecture was validated during an initial R&D project run with engineering school Esisar in 2015. This goal of this new project is to finalize the software. Sales resulting from this project are estimated at €500 K the first year and €600 K the second year.
Financeurs Project financed by the IRT Nanoelec Easytech program, administered by Minalogic.
En collaboration avec Grenoble INP ESISAR

La société : AEM Mu-TEST

Year founded 2010
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