Members news

Dolphin Design


Launching any SoC on a highly competitive market demands a differentiation for which Hisense was searching for an ultra low-power solution to extend battery life-time of wireless-connected devices. Designing such an integrated circuit introduces new challenges: silicon area, power consumption and BoM cost must be aggressively reduced, while dealing with noise issues in a mixed-signal SoC embedding multiple power domains with diverse power modes. 
Dolphin Integration’s SoC Fabric offering covers the SoC networks of clocks and regulated voltages, for a SoC designed with power domains, to deal with these new challenges.


When we first discovered Dolphin Integration, we had in mind to acquire some vital Silicon IPs. Their intensive pre-sales support made us realize that they could provide us with a complete set of SoC Fabric IPs together with the transfer of know-how for implementing safely our low-power SoC.” explained Shawn Zhong, CEO of Hisense Microelectronics.



Dolphin Integration's SoC Fabric firstly stars their library of voltage regulators, compliant with the 8 rules of DELTA to enable mix-and-match from diverse regulator suppliers. Their second contribution automatically manages the in-rush current to share a regulator between multi-mode power domains with their patented "Transition Ramp Controllers". The third innovation was needed to build fast and safely the Activity Control Unit of a SoC with multi-mode power domains, thanks to a kit of modules in the always-on domain.


We are pleased to announce Hisense as a licensee for our SoC Fabric IPs” said Frédéric Renoux, Sales Director at Dolphin Integration. “For their foundry partner and for Hisense themselves, our innovative and silicon-proven SoC Fabric reduces the Time-to-Market of leading edge and robust low-power SoCs at TSMC 55 nm uLP/uLPeF”.



For both the foundry and the IP provider, proving on silicon a SoC Fabric required the block-busting innovation of a Demochip: code-named TaiShan, it provides IP Compatibility Insurance (IPCI) for an assembly of Silicon IP in dynamic interplay while proving the robustness of such SoC Fabric IPs.


More informations

Bienvenue chez Minalogic
Minalogic uses cookies on this site. With your consent, we will use them to measure and analyze the use of the site (analytical cookies).